instruction execution

英 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]

美 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]

网络  指令执行

计算机

英英释义

noun

• (computer science) the process of carrying out an instruction by a computer
  Synonym:execution

双语例句

• But in reality, the upper software drives the underlying hardware, for example different instruction execution and data access affect the underlying hardware circuit directly and result in different power generation.
  但在实际情况中，底层硬件受上层软件驱动，例如不同指令执行和数据存取等软件指令直接影响底层硬件的电路活动，导致不同功耗产生。
• In the traditional Cache, the Cache hit ratio is insured only by the address locality of memory reference instruction stream during program execution, it restricts the improvement of Cache hit ratio.
  在传统的Cache中，仅仅依靠程序执行时访存指令流地址的局域性来保证较高的Cache命中率，使得Cache命中率的提高受到限制。
• If supervision engineer issued a directive, contractor should change by supervision engineer change instruction execution.
  若监理工程师发出了变更指令，承包人就应按监理工程师的变更指令执行。
• In other words, software interrupts always occur at the beginning of an instruction execution cycle.
  换句话说，软件中断常常在指令运行周期的开始。
• Compile the assembler into machine code so that generate PLE file in order to implement the execution mechanism of PLC virtual machine. In this way, the instruction execution speed of PLC is greatly increased and we can save much memory.
  用汇编编译器编译转变成功的汇编程序产生机器码，从而构造出可执行文件&PLE文件，实现PLC虚拟机的机器码执行机制，这样大大提高了PLC指令的执行速度，同时大大节约了内存空间。
• It is more efficient to design a simple instruction set that enable the execution of one instruction per clock cycle.
  设计一个能够在一个时钟周期执行一条指令的简单指令系统才是更有效的。
• Research and Analysis of the Value Prediction and Instruction Reuse Techniques in Speculated Execution
  推测执行中值预测与指令重用技术的研究与分析
• A4-stage instruction pipeline for instruction execution makes at-speed test possible.
  四级指令流水线的引入使全速测试成为可能。
• Based on the ( program counter) PC arbitrage strategy of multi-path execution, designing fetch instruction unit suit for selective dual path execution.
  通过研究多路径执行中的PC仲裁机制，设计适合双路径执行结构的取指部件。
• This paper has discussed the relationship between the machine cycle and instruction execution time for superscalar RISC architecture, issuing multiple instructions in one machine cycle. Several new design features of superscalar RISC architecture with single execution unit and multiple function units have been analysed.
  本文讨论超标量RISC结构中单周期发多条指令中周期和执行指令时间的相对关系，并分析了新型超标量RISC结构的实现方案，其中包括具有单个执行部件和多个执行部件的结构。